Computer Architecture Questions
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22) A bus that transfers data sequentially, one bit at a time using just a single line pair is calleda) a serial bus.b) a single bus.c) a narrow bus.d) a sequential bus.
9) The register that will hold the data value that is being transferred between the CPU and a particular memory location is called thea) PC.b) ALU.c) MAR.d) MDR.
15) When the instruction being executed is to store data, the data will be transferred from another register in the CPU to the _____, and from there it will be transferred into memory.a) IRb) PCc) MARd) MDR
6) Loading the value zero into a register is calleda) inverting a register.b) clearing a register.c) dumping the register.d) incrementing a register.
2) The ALU and CU together are known as thea) CPU.b) instruction set.c) program counter.d) Memory Management Unit.
21) A bus in which there is an individual line for each bit of data, address, and control is called aa) wide bus.b) serial bus.c) parallel bus.d) dedicated bus.
18) The first step in the instruction cycle isa) clear the accumulator.b) fetch the instruction from memory.c) decode the instruction in the accumulator.d) copy the data from the MAR to the MDR.
5) The 1-bit registers that are used to allow the computer to keep track of special conditions (like overflow or power failure) are often calleda) flags.b) loops.c) the ALU.d) I/O counters.
4) The storage locations that are used for a particular defined purpose within the CPU are calleda) RAM.b) storage.c) the bus.d) registers.
3) The area inside of the CPU that holds data temporarily and performs calculations is called thea) accumulator.b) program counter.c) arithmetic logic unit.d) Memory Management Unit.
7) The register that holds the address of the memory location that needs to be accessed is called thea) IR.b) MAR.c) MDR.d) MBR.
8) The register that holds the current instruction is called thea) IR.b) PC.c) LMC.d) MBR.
The performance of cache memory is frequently measured in terms of a quantity called
The information available in a state table may be represented graphically in a
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as
Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called
Which computer architecture holds both programs and data in same main memory?
A condition or iteration statement in programming such as IF or WHILE could change the address in which register first?
Which register holds the address of the next instruction or the address of data to be fetched?
A combinational logic circuit which sends data coming from a single source to two or more separate destinations is