Digital Logic and Computer Architecture
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About
Engineering
Drill Boolean minimization and K-maps, sequential design and finite state machines, datapaths, pipelining and hazards
What it does (3)
Quizzes
Write quick digital logic and architecture items with four options each. Cover number systems and two's complement with overflow detection, Boolean algebra and De Morgan, sum of products and product of sums, Karnaugh map minimization with don't cares, hazards in combinational logic, multiplexers, decoders, adders and their carry propagation, latches versus flip-flops, setup and hold time and maximum clock frequency,…
Tests
Build a graded digital design and architecture exam. Blueprint: 15 percent number representation and arithmetic including two's complement, overflow and fixed-point scaling; 20 percent combinational design from a word specification to a minimized expression via a truth table and Karnaugh map, with don't cares and a hazard discussion; 20 percent sequential design requiring a state table, a state diagram described in…
Flashcards
Make digital logic and architecture flashcards at one idea per card, always stating base and bit width where a number appears. Include representation cards: front asks for a conversion rule or a range, for example the range of an n-bit two's complement integer or how to detect signed overflow in addition, back gives the rule with the bit width symbolic. Include gate and identity cards: front gives a Boolean identity…
