Understanding Timing Hazards in Digital Logic

Dynamic Hazards

A dynamic hazard is more complex. It occurs when an output is supposed to change from one state to another (e.g., $0 \to 1$), but instead "bounces" multiple times (e.g., $0 \to 1 \to 0 \to 1$). This typically happens in multi-level circuits where multiple paths exist between the input and the output, and those paths have significantly different propagation delays.

Detecting and Eliminating Hazards

To design a reliable circuit, engineers must be able to predict where these glitches will occur.

Using K-maps for Detection

Karnaugh Maps (K-maps) are powerful tools for detecting static hazards in two-level logic circuits.

1. In Sum-of-Products (SoP) circuits: A static-1 hazard exists if two adjacent groups of 1s (prime implicants) are not covered by a single, larger group. If the transition occurs between these two groups, there is a momentary window where neither group is "active," causing a glitch.
2. In Product-of-Sums (PoS) circuits: A static-0 hazard exists if adjacent groups of 0s are not connected by a single overlapping term.

The Consensus Term Method

The most common way to eliminate a static hazard is by adding consensus terms. A consensus term is a redundant product term that "bridges" the gap between two existing terms.

For example, if you have a function $F = X + X'$, which is logically always 1, a transition in $X$ might cause a glitch if the gates don't switch at the exact same time. By adding a redundant term that covers the transition, you ensure the output remains stable.

Exam Tip: When using K-maps to eliminate static-1 hazards, look for adjacent cells containing 1s that are not part of the same loop. Add a new loop (a consensus term) that covers the transition between those two loops.

Summary of Design Strategies

• To fix Static Hazards: Use the "brute force" method of including all prime implicants (the complete sum or product) to ensure no gaps exist between terms.
• To fix Dynamic Hazards: Try to rearrange multi-level circuits into two-level designs (like SoP or PoS) to reduce the number of paths an input can take.
• Practical Note: In many modern systems, hazards are mitigated by using synchronous design. By using a clock and flip-flops, the circuit only "samples" the output at specific intervals, allowing glitches to settle before the value is used by the next stage.